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audacious-plugins-3.6-beta1-prevent-narrowing.patch

Michael Schwendt, February 20, 2015 00:11

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audacious-plugins-3.6-beta1-gtk3/src/adplug/core/fmopl.cc 2015-02-19 23:45:40.000000000 +0100
124 124 
/* key scale level */
125 125 
/* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */
126 126 
#define DV (EG_STEP/2)
127 
static const UINT32 KSL_TABLE[8*16]=
127 
static const double KSL_TABLE[8*16]=
128 128 
{
129 129 
	/* OCT 0 */
130 130 
	 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
......
172 172 
/* sustain lebel table (3db per step) */
173 173 
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
174 174 
#define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST
175 
static const INT32 SL_TABLE[16]={
175 
static const double SL_TABLE[16]={
176 176 
 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
177 177 
 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
178 178 
};
......
197 197 

  		




  198
  198
  
    
/* multiple table */

  		




  199
  199
  
    
#define ML 2

  		




  200
  
  
    
static const UINT32 MUL_TABLE[16]= {

  		




  
  200
  
    
static const double MUL_TABLE[16]= {

  		




  201
  201
  
    
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */

  		




  202
  202
  
    
   0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,

  		




  203
  203
  
    
   8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML

  		




  ......




  392
  392
  
    
	OPL_CH   *CH   = &OPL->P_CH[slot/2];

  		




  393
  393
  
    
	OPL_SLOT *SLOT = &CH->SLOT[slot&1];

  		




  394
  394
  
    

  		




  395
  
  
    
	SLOT->mul    = MUL_TABLE[v&0x0f];

  		




  
  395
  
    
	SLOT->mul    = static_cast<UINT32>(MUL_TABLE[v&0x0f]);

  		




  396
  396
  
    
	SLOT->KSR    = (v&0x10) ? 0 : 2;

  		




  397
  397
  
    
	SLOT->eg_typ = (v&0x20)>>5;

  		




  398
  398
  
    
	SLOT->vib    = (v&0x40);

  		




  ......




  441
  441
  
    
	int sl = v>>4;

  		




  442
  442
  
    
	int rr = v & 0x0f;

  		




  443
  443
  
    

  		




  444
  
  
    
	SLOT->SL = SL_TABLE[sl];

  		




  
  444
  
    
	SLOT->SL = static_cast<INT32>(SL_TABLE[sl]);

  		




  445
  445
  
    
	if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL;

  		




  446
  446
  
    
	SLOT->RR = &OPL->DR_TABLE[rr<<2];

  		




  447
  447
  
    
	SLOT->evsr = SLOT->RR[SLOT->ksr];

  		




  ......




  977
  977
  
    
			int fnum   = block_fnum&0x3ff;

  		




  978
  978
  
    
			CH->block_fnum = block_fnum;

  		




  979
  979
  
    

  		




  980
  
  
    
			CH->ksl_base = KSL_TABLE[block_fnum>>6];

  		




  
  980
  
    
			CH->ksl_base = static_cast<UINT32>(KSL_TABLE[block_fnum>>6]);

  		




  981
  981
  
    
			CH->fc = OPL->FN_TABLE[fnum]>>blockRv;

  		




  982
  982
  
    
			CH->kcode = CH->block_fnum>>9;

  		




  983
  983
  
    
			if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1;

  		












  

    
      audacious-plugins-3.6-beta1-gtk3/src/psf/psx.cc	2015-02-19 23:18:56.000000000 +0100
    
  





  72
  72
  
    

  		




  73
  73
  
    
static uint8_t mips_reg_layout[] =

  		




  74
  74
  
    
{

  		




  75
  
  
    
	MIPS_PC, -1,

  		




  76
  
  
    
	MIPS_DELAYV, MIPS_DELAYR, -1,

  		




  77
  
  
    
	MIPS_HI, MIPS_LO, -1,

  		




  78
  
  
    
	-1,

  		




  79
  
  
    
	MIPS_R0, MIPS_R1, -1,

  		




  80
  
  
    
	MIPS_R2, MIPS_R3, -1,

  		




  81
  
  
    
	MIPS_R4, MIPS_R5, -1,

  		




  82
  
  
    
	MIPS_R6, MIPS_R7, -1,

  		




  83
  
  
    
	MIPS_R8, MIPS_R9, -1,

  		




  84
  
  
    
	MIPS_R10, MIPS_R11, -1,

  		




  85
  
  
    
	MIPS_R12, MIPS_R13, -1,

  		




  86
  
  
    
	MIPS_R14, MIPS_R15, -1,

  		




  87
  
  
    
	MIPS_R16, MIPS_R17, -1,

  		




  88
  
  
    
	MIPS_R18, MIPS_R19, -1,

  		




  89
  
  
    
	MIPS_R20, MIPS_R21, -1,

  		




  90
  
  
    
	MIPS_R22, MIPS_R23, -1,

  		




  91
  
  
    
	MIPS_R24, MIPS_R25, -1,

  		




  92
  
  
    
	MIPS_R26, MIPS_R27, -1,

  		




  93
  
  
    
	MIPS_R28, MIPS_R29, -1,

  		




  94
  
  
    
	MIPS_R30, MIPS_R31, -1,

  		




  95
  
  
    
	-1,

  		




  96
  
  
    
	MIPS_CP0R0, MIPS_CP0R1, -1,

  		




  97
  
  
    
	MIPS_CP0R2, MIPS_CP0R3, -1,

  		




  98
  
  
    
	MIPS_CP0R4, MIPS_CP0R5, -1,

  		




  99
  
  
    
	MIPS_CP0R6, MIPS_CP0R7, -1,

  		




  100
  
  
    
	MIPS_CP0R8, MIPS_CP0R9, -1,

  		




  101
  
  
    
	MIPS_CP0R10, MIPS_CP0R11, -1,

  		




  102
  
  
    
	MIPS_CP0R12, MIPS_CP0R13, -1,

  		




  103
  
  
    
	MIPS_CP0R14, MIPS_CP0R15, -1,

  		




  104
  
  
    
	MIPS_CP0R16, MIPS_CP0R17, -1,

  		




  105
  
  
    
	MIPS_CP0R18, MIPS_CP0R19, -1,

  		




  106
  
  
    
	MIPS_CP0R20, MIPS_CP0R21, -1,

  		




  107
  
  
    
	MIPS_CP0R22, MIPS_CP0R23, -1,

  		




  108
  
  
    
	MIPS_CP0R24, MIPS_CP0R25, -1,

  		




  109
  
  
    
	MIPS_CP0R26, MIPS_CP0R27, -1,

  		




  110
  
  
    
	MIPS_CP0R28, MIPS_CP0R29, -1,

  		




  111
  
  
    
	MIPS_CP0R30, MIPS_CP0R31, -1,

  		




  112
  
  
    
	-1,

  		




  113
  
  
    
	MIPS_CP2DR0, MIPS_CP2DR1, -1,

  		




  114
  
  
    
	MIPS_CP2DR2, MIPS_CP2DR3, -1,

  		




  115
  
  
    
	MIPS_CP2DR4, MIPS_CP2DR5, -1,

  		




  116
  
  
    
	MIPS_CP2DR6, MIPS_CP2DR7, -1,

  		




  117
  
  
    
	MIPS_CP2DR8, MIPS_CP2DR9, -1,

  		




  118
  
  
    
	MIPS_CP2DR10, MIPS_CP2DR11, -1,

  		




  119
  
  
    
	MIPS_CP2DR12, MIPS_CP2DR13, -1,

  		




  120
  
  
    
	MIPS_CP2DR14, MIPS_CP2DR15, -1,

  		




  121
  
  
    
	MIPS_CP2DR16, MIPS_CP2DR17, -1,

  		




  122
  
  
    
	MIPS_CP2DR18, MIPS_CP2DR19, -1,

  		




  123
  
  
    
	MIPS_CP2DR20, MIPS_CP2DR21, -1,

  		




  124
  
  
    
	MIPS_CP2DR22, MIPS_CP2DR23, -1,

  		




  125
  
  
    
	MIPS_CP2DR24, MIPS_CP2DR25, -1,

  		




  126
  
  
    
	MIPS_CP2DR26, MIPS_CP2DR27, -1,

  		




  127
  
  
    
	MIPS_CP2DR28, MIPS_CP2DR29, -1,

  		




  128
  
  
    
	MIPS_CP2DR30, MIPS_CP2DR31, -1,

  		




  129
  
  
    
	-1,

  		




  130
  
  
    
	MIPS_CP2CR0, MIPS_CP2CR1, -1,

  		




  131
  
  
    
	MIPS_CP2CR2, MIPS_CP2CR3, -1,

  		




  132
  
  
    
	MIPS_CP2CR4, MIPS_CP2CR5, -1,

  		




  133
  
  
    
	MIPS_CP2CR6, MIPS_CP2CR7, -1,

  		




  134
  
  
    
	MIPS_CP2CR8, MIPS_CP2CR9, -1,

  		




  135
  
  
    
	MIPS_CP2CR10, MIPS_CP2CR11, -1,

  		




  136
  
  
    
	MIPS_CP2CR12, MIPS_CP2CR13, -1,

  		




  137
  
  
    
	MIPS_CP2CR14, MIPS_CP2CR15, -1,

  		




  138
  
  
    
	MIPS_CP2CR16, MIPS_CP2CR17, -1,

  		




  139
  
  
    
	MIPS_CP2CR18, MIPS_CP2CR19, -1,

  		




  140
  
  
    
	MIPS_CP2CR20, MIPS_CP2CR21, -1,

  		




  141
  
  
    
	MIPS_CP2CR22, MIPS_CP2CR23, -1,

  		




  142
  
  
    
	MIPS_CP2CR24, MIPS_CP2CR25, -1,

  		




  143
  
  
    
	MIPS_CP2CR26, MIPS_CP2CR27, -1,

  		




  144
  
  
    
	MIPS_CP2CR28, MIPS_CP2CR29, -1,

  		




  
  75
  
    
	MIPS_PC, 0xFF,

  		




  
  76
  
    
	MIPS_DELAYV, MIPS_DELAYR, 0xFF,

  		




  
  77
  
    
	MIPS_HI, MIPS_LO, 0xFF,

  		




  
  78
  
    
	0xFF,

  		




  
  79
  
    
	MIPS_R0, MIPS_R1, 0xFF,

  		




  
  80
  
    
	MIPS_R2, MIPS_R3, 0xFF,

  		




  
  81
  
    
	MIPS_R4, MIPS_R5, 0xFF,

  		




  
  82
  
    
	MIPS_R6, MIPS_R7, 0xFF,

  		




  
  83
  
    
	MIPS_R8, MIPS_R9, 0xFF,

  		




  
  84
  
    
	MIPS_R10, MIPS_R11, 0xFF,

  		




  
  85
  
    
	MIPS_R12, MIPS_R13, 0xFF,

  		




  
  86
  
    
	MIPS_R14, MIPS_R15, 0xFF,

  		




  
  87
  
    
	MIPS_R16, MIPS_R17, 0xFF,

  		




  
  88
  
    
	MIPS_R18, MIPS_R19, 0xFF,

  		




  
  89
  
    
	MIPS_R20, MIPS_R21, 0xFF,

  		




  
  90
  
    
	MIPS_R22, MIPS_R23, 0xFF,

  		




  
  91
  
    
	MIPS_R24, MIPS_R25, 0xFF,

  		




  
  92
  
    
	MIPS_R26, MIPS_R27, 0xFF,

  		




  
  93
  
    
	MIPS_R28, MIPS_R29, 0xFF,

  		




  
  94
  
    
	MIPS_R30, MIPS_R31, 0xFF,

  		




  
  95
  
    
	0xFF,

  		




  
  96
  
    
	MIPS_CP0R0, MIPS_CP0R1, 0xFF,

  		




  
  97
  
    
	MIPS_CP0R2, MIPS_CP0R3, 0xFF,

  		




  
  98
  
    
	MIPS_CP0R4, MIPS_CP0R5, 0xFF,

  		




  
  99
  
    
	MIPS_CP0R6, MIPS_CP0R7, 0xFF,

  		




  
  100
  
    
	MIPS_CP0R8, MIPS_CP0R9, 0xFF,

  		




  
  101
  
    
	MIPS_CP0R10, MIPS_CP0R11, 0xFF,

  		




  
  102
  
    
	MIPS_CP0R12, MIPS_CP0R13, 0xFF,

  		




  
  103
  
    
	MIPS_CP0R14, MIPS_CP0R15, 0xFF,

  		




  
  104
  
    
	MIPS_CP0R16, MIPS_CP0R17, 0xFF,

  		




  
  105
  
    
	MIPS_CP0R18, MIPS_CP0R19, 0xFF,

  		




  
  106
  
    
	MIPS_CP0R20, MIPS_CP0R21, 0xFF,

  		




  
  107
  
    
	MIPS_CP0R22, MIPS_CP0R23, 0xFF,

  		




  
  108
  
    
	MIPS_CP0R24, MIPS_CP0R25, 0xFF,

  		




  
  109
  
    
	MIPS_CP0R26, MIPS_CP0R27, 0xFF,

  		




  
  110
  
    
	MIPS_CP0R28, MIPS_CP0R29, 0xFF,

  		




  
  111
  
    
	MIPS_CP0R30, MIPS_CP0R31, 0xFF,

  		




  
  112
  
    
	0xFF,

  		




  
  113
  
    
	MIPS_CP2DR0, MIPS_CP2DR1, 0xFF,

  		




  
  114
  
    
	MIPS_CP2DR2, MIPS_CP2DR3, 0xFF,

  		




  
  115
  
    
	MIPS_CP2DR4, MIPS_CP2DR5, 0xFF,

  		




  
  116
  
    
	MIPS_CP2DR6, MIPS_CP2DR7, 0xFF,

  		




  
  117
  
    
	MIPS_CP2DR8, MIPS_CP2DR9, 0xFF,

  		




  
  118
  
    
	MIPS_CP2DR10, MIPS_CP2DR11, 0xFF,

  		




  
  119
  
    
	MIPS_CP2DR12, MIPS_CP2DR13, 0xFF,

  		




  
  120
  
    
	MIPS_CP2DR14, MIPS_CP2DR15, 0xFF,

  		




  
  121
  
    
	MIPS_CP2DR16, MIPS_CP2DR17, 0xFF,

  		




  
  122
  
    
	MIPS_CP2DR18, MIPS_CP2DR19, 0xFF,

  		




  
  123
  
    
	MIPS_CP2DR20, MIPS_CP2DR21, 0xFF,

  		




  
  124
  
    
	MIPS_CP2DR22, MIPS_CP2DR23, 0xFF,

  		




  
  125
  
    
	MIPS_CP2DR24, MIPS_CP2DR25, 0xFF,

  		




  
  126
  
    
	MIPS_CP2DR26, MIPS_CP2DR27, 0xFF,

  		




  
  127
  
    
	MIPS_CP2DR28, MIPS_CP2DR29, 0xFF,

  		




  
  128
  
    
	MIPS_CP2DR30, MIPS_CP2DR31, 0xFF,

  		




  
  129
  
    
	0xFF,

  		




  
  130
  
    
	MIPS_CP2CR0, MIPS_CP2CR1, 0xFF,

  		




  
  131
  
    
	MIPS_CP2CR2, MIPS_CP2CR3, 0xFF,

  		




  
  132
  
    
	MIPS_CP2CR4, MIPS_CP2CR5, 0xFF,

  		




  
  133
  
    
	MIPS_CP2CR6, MIPS_CP2CR7, 0xFF,

  		




  
  134
  
    
	MIPS_CP2CR8, MIPS_CP2CR9, 0xFF,

  		




  
  135
  
    
	MIPS_CP2CR10, MIPS_CP2CR11, 0xFF,

  		




  
  136
  
    
	MIPS_CP2CR12, MIPS_CP2CR13, 0xFF,

  		




  
  137
  
    
	MIPS_CP2CR14, MIPS_CP2CR15, 0xFF,

  		




  
  138
  
    
	MIPS_CP2CR16, MIPS_CP2CR17, 0xFF,

  		




  
  139
  
    
	MIPS_CP2CR18, MIPS_CP2CR19, 0xFF,

  		




  
  140
  
    
	MIPS_CP2CR20, MIPS_CP2CR21, 0xFF,

  		




  
  141
  
    
	MIPS_CP2CR22, MIPS_CP2CR23, 0xFF,

  		




  
  142
  
    
	MIPS_CP2CR24, MIPS_CP2CR25, 0xFF,

  		




  
  143
  
    
	MIPS_CP2CR26, MIPS_CP2CR27, 0xFF,

  		




  
  144
  
    
	MIPS_CP2CR28, MIPS_CP2CR29, 0xFF,

  		




  145
  145
  
    
	MIPS_CP2CR30, MIPS_CP2CR31,

  		




  146
  146
  
    
	0

  		




  147
  147
  
    
};